UK firm Agile Analog has available a complete set of the key analogue IP needed to fast track an IoT design.

Arranged in six blocks, they wrap round the user’s choice of processor core and memory to provide all the vital analogue functions required to interface between the digital world of the processor and the analogue real world.

“We call these our foundation IP as they provide all the functionality needed for an IoT design,” said Barry Paterson, Agile Analog’s CEO. “Naturally, customers can mix and match whichever blocks they require for their design and adjust the number of each IP within it.”

For example, the power block could contain several LDOs to provide the necessary internal voltage rails together with Agile POR to ensure the SoC only starts when stable voltage rails are present. The IC heath and monitoring block monitors the SoC die temperature with the firm’s TSense while the IR Drop monitors long-term aging effects.

Ensuring the SoC is secure is a key concern, so the security protection block uses the firm’s VGlitch and TSense to monitor attack vectors using voltage and temperature manipulation. Users may not need a radio interface but, if they do, the radio interface can support whichever one they require, such as low-power Bluetooth or LoRa.

“Effectively, this provides a foundation toolkit for all the analogue parts that a design might possibly need to fast track, simplify and de-risk the design process,” Paterson added. “We have included all the features and functions that a customer would require so that they can select exactly what they require from the set without worrying that they missed something vital.”

Importantly, he said the high level of customer support provided ensured easy and perfect integration unlike some rivals who just sold the analogue blocks and left users to figure out how to use them.

“Also, customers have the security of knowing that, by using IP from one supplier, all our IP blocks have been fully tested for compatibility with every other one of our blocks,” he said.

A key feature of that offering is it is supported by the company for the design phase to ensure it meets power, performance and area requirements. This also includes supporting the integration of the IP into the overall design. This is made easier by the IPs within the blocks being internally interconnected and that the blocks have external interfaces so they look like digital blocks and can drop into the digital design flow.

The firm’s Composa technology enables these blocks to be generated and validated for whatever process and node the user requires. All major foundries are supported including TSMC, GlobalFoundries, Samsung Foundry and SMIC as well as other IC foundries and manufacturers.