Renesas ASIL D SoC for ADAS and AD

  • December 21, 2020
  • William Payne

Japanese semiconductor firm Renesas Electronics has unveiled an ASIL D system on chip for advanced driver assistance systems and automated driving systems:the R-Car V3U. The new SoC delivers 60 TOPS with low power consumption for deep learning processing and up to 96,000 DMIPS.

The new R-Car V3U is the first SoC using the R-Car Gen 4 architecture within the open and flexible Renesas autonomy platform for ADAS and AD. With the launch of R-Car V3U, the platform is now ready to offer scalability from entry-level NCAP applications up to highly automated driving systems.

The R-Car V3U SoC integrates multiple sophisticated safety mechanisms that provide high coverage with fast detection and response for random hardware faults, and is expected to achieve ASIL D metrics for the majority of the SoC processing chain, as well as reducing design complexity, time to market, and system cost.

The SoC delivers flexible DNN (Deep Neural Network) and AI machine learning functions. Its architecture is capable of handling any state-of-the-art neural networks for automotive obstacle detection and classification tasks while maintaining 60 TOPS with low power consumption and an air cooling system.

A range of programmable engines are provided with the R-Car V3U, including DSP for radar processing, multi-threading computer vision engine for traditional computer vision algorithms, image signal processing to enhance image quality, and additional hardware accelerators for key algorithms such as dense optical flow, stereo disparity, and object classification.

“We are excited to introduce the newest generation of our popular R-Car SoCs for the next generation of ADAS and AD vehicles,” said Naoki Yoshida, Vice President, Automotive Digital Products Marketing Division at Renesas. “The R-Car V3U leverages assets developed on previous-generation devices, such as ADAS and Level 2 perception stack with the R-Car V3M and R-Car V3H, along with the Renesas autonomy platform, to offer a smooth migration path to single-chip Level 3 automated driving with short development turnaround and safe production launch.”