SureCore memory eases design for hearables

  • March 21, 2023
  • Steve Rogerson

To speed up design times for hearables and wearables, UK firm SureCore has launched off-the-shelf, low-power memory IP that is available for use at the most popular industry nodes.

Wearables and hearables typically require a long battery life and an always-on listening mode. SureCore’s EverOn single port SRAM has an operating voltage range from 0.6V to process-nominal voltage. This has been adopted by both smart watch and true wireless stereo (TWS) earbud developers.

Standard memory designs can only work down to process-nominal voltage, however EverOn’s banking structure allows architects to implement fine-grained, even lower voltage, sleep modes for up to 50% power savings compared with standard memory cells. Thus, the voltage of the chip can be dynamically adjusted up and down in tandem with the performance requirements for the operation in hand to save power as required.

For example, this could be going from a high performance to a low performance mode or even a monitoring state awaiting a wake-up event. Front end views are available in the firm’s web-based compiler to help facilitate evaluation. Versions for 40ULP, 28HPC+ and 22ULL are available with memory instances up to 0.5Mbyte supported.

Another group of applications include edge AI, machine learning and hearing aids that need to increase battery life by reducing both operating and stand-by power consumption.

These are served by SureCore’s PowerMiser low dynamic power, single port SRAM that is said to deliver up to 50% dynamic power savings compared with market leaders in addition to an average 20% saving on leakage power. The patented bit line voltage control techniques virtually eliminate performance compromises even with a reduced power envelope.

Retentive sleep modes, including light sleep for rapid wake-up as well as deep-sleep for increased leakage current savings, are available. Various periphery Vt options are possible to optimise for either leakage or speed as demanded by the application. Front end views are available in a web-based compiler to help facilitate evaluation. Versions for 28HPC+, 22ULL, 16FFC and 28FDSOI are available with memory instances up to 0.5Mbyte supported.

“Customers invariably want a certain amount of customisation to precisely fit their project’s needs,” said Paul Wells, SureCore’s CEO. “However, we have found that certain memory configurations keep coming up time and again because similar projects will have the same memory requirements. We have therefore productised these to become off-the-shelf IP that are immediately available to just be dropped into designs such as wearables, hearables, edge-AI and IoT where ultra-low power consumption is vital for competitive differentiation and hence to the success of the end product.”